Honers of members
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MXIC Contests

1)C.-C. Tun, K.-S. Lee, C.-T. Wu, and C.-K. Choe, 1st MXIC Design Contest First Prize
2)K.-F. Chen, C.-J. Lian, H.-H. Chen, and T.-H. Chang, 1st MXIC Design Contest Second Prize
3)Y.-C. Wang, H.-C. Chang, and W.-M. Chiao, 1st MXIC Design Contest Second Prize
4)Y.-H. Huang and M.-L. Liu, 1st MXIC Design Contest Excellent Work
5)S.-L. Chen, C.-T. Wu, C.-C. Tun, and C.-K. Choe, 1st MXIC Design Contest Excellent Work

IC Contests

1)S.-F and Lin, J.-C. Wu, 1st Ministry of Education IC Design Contest (Cell-Based) First Prize
2)S.-Y. Ma and C.-F. Shen, 1st Ministry of Education IC Design Contest (Full-Custom) Second Prize
3)T.-C. Wan and C.-Y. Chen, 2st Ministry of Education IC Design Contest (Cell-Based) First Prize
4)C.-K. Chen and Y.-C. Chang, 3st Ministry of Education IC Design Contest (Cell-Based) Excellent Work

IP Contests


1)T.-C. Wang and C.-Y. Chen, 1st Ministry of Education IP Design Contest Excellent Work
2) C.-J. Lian and H.-C. Chang, 1st Ministry of Education IP Design Contest Excellent Work
3)C.-K. Chen and P.-C. Tzeng, 2st Ministry of Education IP Design ContestFirst Prize
4) S.-F. Lin and W.-T. Chi, 2st Ministry of Education IP Design Contest Excellent Work

Paper

1) Ching-Yuan Yang, Guang-Kaai Dehng, June-Ming Hsu, and Shen-Iuan Liu, ˇ§New Dynamic Flip-Flops for High-Speed Dual-Modulus Prescalerˇ¨, IEEE J.S.S.C., vol. 33, no.10, pp. 1568-1571, Oct. 1998.

2)Shyh-Yih Ma and Liang-Gee Chen, "A Single Chip CMOS APS Camera with Direct Frame Difference Output," IEEE J. Solid-State Circuits, vol. 34, pp. 1415-1418, Oct. 1999.

3) Guang-Kaai Dehng, June-Ming Hsu, Ching-Yuan Yang, and Shen-Iuan Liu, ˇ§Clock-Deskew Buffer Using a SAR-controlled Delay-Locked Loopˇ¨, IEEE J.S.S.C., vol. 35, no.8, pp. 1128-1136, Aug. 2000.

4) Guang-Kaai Dehng, Ching-Yuan Yang, June-Ming Hsu, and Shen-Iuan Liu, ˇ§A 900-MHz/1-V CMOS Frequency Synthesizerˇ¨, IEEE J.S.S.C., vol. 35, no.8, pp. 1211-1214, Aug. 2000.

5) Ching-Yuan Yang and Shen-Iuan Liu,"Fast-switching frequency synthesizer with a discriminator-aided phase detector", IEEE Journal of Solid-State Circuits, SC-35, pp. 1445-1452, Oct. 2000.

6) Lan-Da Van (Student Member), S. S. Wang, and W. S. Feng, "Design of the lower-error fiexed-width multiplier and its application", IEEE Trans. Circuits Syst. II, vol. 47, pp. 1112-1118, Oct. 2000.

7) Lan-Da Van (Student Member), and W. S. Feng, "An efficient systolic architecture for the DLMS adaptive filter and its applications," IEEE Trans. Circuits Syst. II, accepted as a regular paper, 2001.